HDL and timing analysis of AMBA AHB on FPGA platform

Abstract

This paper presents the comparison in the terms of hardware and timing for the AMBA AHB bus while implementing on various FPGA platforms. Also, the on-chip power consumption is also compared for SPARTAN 3E, VIRTEX 7 and KINTEX 7. The implementation of AMBA AHB bus is implemented while considering the optimization goal with SPEED and other is AREA and both results are achieved successfully and shown in the comparison table and graph.