S. Ryu, S. Krishnaswami, M. Das, B. Hull, J. Richmond, B. Heath, A. Agarwal, J. Palmour, J. Scofield
{"title":"10.3 m/spl Omega/-cm/sup 2/, 2 kV Power DMOSFETs in 4H-SiC","authors":"S. Ryu, S. Krishnaswami, M. Das, B. Hull, J. Richmond, B. Heath, A. Agarwal, J. Palmour, J. Scofield","doi":"10.1109/ISPSD.2005.1488004","DOIUrl":null,"url":null,"abstract":"High voltage power DMOSFETs in 4H-SiC are presented in this paper. A 0.5 μm long MOS gate length was used to minimize the MOS channel resistance. The DMOSFETs were able to block 2 kV with gate shorted to the source. At room temperature, a specific on-resistance of 10.3 mΩ-cm was measured with a gate bias of 12 V. The specific on-resistance was reduced to 8 mΩ-cm with 17 V on the gate. At 150 C, the specific on-resistance increased to 14 mΩ-cm with a VGS of 12 V. The increase in drift layer resistance due to a decrease in bulk electron mobility was partly cancelled out by the negative shift in MOS threshold voltage. The device showed substantially lower parasitic capacitance values compared to a typical silicon power MOSFET with a comparable blocking voltage rating, which suggest that this device can offer significant improvement in switching performance over commercially available silicon power MOSFETs.","PeriodicalId":154808,"journal":{"name":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2005.1488004","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
High voltage power DMOSFETs in 4H-SiC are presented in this paper. A 0.5 μm long MOS gate length was used to minimize the MOS channel resistance. The DMOSFETs were able to block 2 kV with gate shorted to the source. At room temperature, a specific on-resistance of 10.3 mΩ-cm was measured with a gate bias of 12 V. The specific on-resistance was reduced to 8 mΩ-cm with 17 V on the gate. At 150 C, the specific on-resistance increased to 14 mΩ-cm with a VGS of 12 V. The increase in drift layer resistance due to a decrease in bulk electron mobility was partly cancelled out by the negative shift in MOS threshold voltage. The device showed substantially lower parasitic capacitance values compared to a typical silicon power MOSFET with a comparable blocking voltage rating, which suggest that this device can offer significant improvement in switching performance over commercially available silicon power MOSFETs.