{"title":"The impact of an external body-bias on the hot-carrier degradation of partially depleted SOI N-MOSFETs at cryogenic temperatures","authors":"F. Dieudonné, J. Jomaah, C. Raynaud, F. Balestra","doi":"10.1109/WOLTE.2002.1022441","DOIUrl":null,"url":null,"abstract":"Hot-carrier effects were studied in body-tied Partially Depleted SOI MOSFETs in a wide range of temperature, from 300 K down to 20 K. Devices under experimental tests were 0.25 μm long N-MOSFETs with a 10μm width. In this paper, the role of externally applied body-bias on the hot-carrier induced degradation is further investigated for five different temperatures. Our devices underwent accelerated electrical stress applying different negative body-biases as well as drain and front gate biases chosen to obtain reasonable stress duration. The variations of the main electrical parameters such as the maximal transconductance, the driving current or the threshold voltage are reported.","PeriodicalId":338080,"journal":{"name":"Proceedings of the 5th European Workshop on Low Temperature Electronics","volume":"160 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 5th European Workshop on Low Temperature Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WOLTE.2002.1022441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Hot-carrier effects were studied in body-tied Partially Depleted SOI MOSFETs in a wide range of temperature, from 300 K down to 20 K. Devices under experimental tests were 0.25 μm long N-MOSFETs with a 10μm width. In this paper, the role of externally applied body-bias on the hot-carrier induced degradation is further investigated for five different temperatures. Our devices underwent accelerated electrical stress applying different negative body-biases as well as drain and front gate biases chosen to obtain reasonable stress duration. The variations of the main electrical parameters such as the maximal transconductance, the driving current or the threshold voltage are reported.