An Effective TSV Self-Repair Scheme for 3D-Stacked ICs

Abstract

Various types of defects are prone to be occurred inside the TSV during the manufacturing and bonding steps, thereby severely impacting the yield of 3D-stacked ICs. Moreover, several types of TSV defects are latent and may easily escape detection during the manufacturing test. However, these latent TSVs are prone to degrade during the field operation and may eventually become faulty and then destroy the entire 3D-stacked IC. To tackle the above problems, in this paper, we present an effective TSV self-repair scheme for 3D-stacked ICs. By designing redundant TSVs and a TSV self-repair architecture, the proposed scheme can effectively repair faulty TSVs detected by manufacturing test for improving the yield of 3D-stacked ICs. Moreover, the latent TSVS failed and then detected during the in-field operation can also be self-repaired, thereby elevating the 3D ICs' quality and reliability. Experimental results are presented to validate the proposed method.