One-transistor-cell multiple-valued CAM for a collision detection VLSI processor

Abstract

Parallel search and parallel comparison are major advantages of content-addressable memories (CAMs) over random-access memories. However, a CAM is more complex and has lower storage density than a conventional address-based memory because of the overhead involved in the storage, comparison, manipulation, and output-selection logic. A CAM based on multiple-valued logic is proposed for high-speed word-parallel magnitude comparison. A typical application of the multiple-valued CAM is a collision detection VLSI processor for intelligent vehicles.