F. Wilhelmi, Y. Komatsu, S. Yamaguchi, Y. Uchida, R. Nemoto, A. Lindemann
{"title":"Effect of Substrate Thinning and Junction-Side Cooling on Thermal Properties of Ga2O3 Diodes","authors":"F. Wilhelmi, Y. Komatsu, S. Yamaguchi, Y. Uchida, R. Nemoto, A. Lindemann","doi":"10.23919/ICEP55381.2022.9795473","DOIUrl":null,"url":null,"abstract":"Gallium oxide (Ga2O3) has gained interest as a material for power electronic devices, but its low thermal conductivity poses a substantial challenge. Therefore, this paper investigates assembly strategies for Ga2O3 power diodes using simulative and experimental thermal studies. By substrate thinning from 600 μm to 200 μm, the maximum chip temperature is reduced by more than one third. The lowest rise in junction temperature, close to that of a commercial SiC Schottky diode, can be achieved by flip-chip assembly when the entire anode area is contacted. Yet, small gaps in the contacting area can significantly increase the local peak temperature.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"281 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Electronics Packaging (ICEP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/ICEP55381.2022.9795473","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Gallium oxide (Ga2O3) has gained interest as a material for power electronic devices, but its low thermal conductivity poses a substantial challenge. Therefore, this paper investigates assembly strategies for Ga2O3 power diodes using simulative and experimental thermal studies. By substrate thinning from 600 μm to 200 μm, the maximum chip temperature is reduced by more than one third. The lowest rise in junction temperature, close to that of a commercial SiC Schottky diode, can be achieved by flip-chip assembly when the entire anode area is contacted. Yet, small gaps in the contacting area can significantly increase the local peak temperature.