Low power 120 KSPS 12bit SAR ADC with a novel switch control method for internal CDAC

Abhisek Dey, T. K. Bhattacharyya
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引用次数: 9

Abstract

A low power 1.3V 12bit successive approximation register analog-to-digital converter (SAR ADC) is presented for MEMS and biomedical applications. In the DAC of this ADC, a new switch control technique has been proposed to make the ADC more energy as well as area efficient. Besides, a very high resolution, low offset CMOS comparator is designed for the satisfactory operation of the ADC. The complete ADC has been implemented using UMC 0.18µm RF/CMOS process with 1.8V supply voltage and 1.3V reference voltage for the DAC. Its performance has been verified by spectre simulation. The ADC achieved a sampling rate of 120KSPS and a power consumption of 3mW at 1.8V supply voltage. Its DNL and INL are 0.68LSB and 0.7LSB respectively.
低功耗120 KSPS 12位SAR ADC,内部CDAC采用新颖的开关控制方法
提出了一种低功耗1.3V 12位连续逼近寄存器模数转换器(SAR ADC),用于MEMS和生物医学应用。在该模数转换器的DAC中,提出了一种新的开关控制技术,使模数转换器具有更高的能量和面积效率。此外,还设计了一个高分辨率、低偏置的CMOS比较器,以保证ADC的正常工作。完整的ADC采用UMC 0.18µm RF/CMOS工艺实现,电源电压为1.8V, DAC参考电压为1.3V。通过光谱仿真验证了其性能。该ADC在1.8V供电电压下的采样率为120KSPS,功耗为3mW。DNL和INL分别为0.68LSB和0.7LSB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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