A design of 500MHz 10-read 6-write register file

Yu Qian, Wang Dong-hui, Zhang Tie-jun, Hou Chao-huan
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引用次数: 2

Abstract

Register file is needed to work in high speed for high performance superscalar processors to execute multiple parallel instructions. A 10-read 6-write write-through register file, customized in 1.8V 0.18mum CMOS technology, is introduced here, every port of which can be accessed individually. It comprises two arrays of modified 16-port memory cells, some low-power SCL decoders and a local clock generator, which is designed to enhance the range of working frequency. The results of the function verification and the performance analysis show that the register file can work in 500MHz with 46mW power consumption. The macro block's area is 0.19mm. It can meet the requirements of both high performance processors and embedded ones
一种500MHz 10读6写寄存器文件的设计
高性能超标量处理器在高速运行时需要寄存器文件来执行多个并行指令。本文介绍了一种采用1.8V 0.18mum CMOS技术定制的10读6写透写寄存器文件,每个端口都可以单独访问。它由两个改良的16端口存储单元阵列、一些低功耗SCL解码器和一个本地时钟发生器组成,旨在提高工作频率的范围。功能验证和性能分析结果表明,该寄存器文件可以在500MHz频率下工作,功耗为46mW。宏观块的面积为0.19mm。它可以满足高性能处理器和嵌入式处理器的要求
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