Numerical Calculation Of Ground-plane Impedance In Multilayer Printed Circuit Boards

Abstract

As circuit speed and density increase, the design of ground planes and the placement of bypass capacitors in multilayer printed circuit boards becomes increasingly difficult because the noise due to simultaneous switching activity and electromagnetic coupling becomes a key factor in system performance. Although the plane impedance effect, which is important in estimating the noise, can often be incorporated into equivalent circuit models for use in circuit simulations, there is usually no easy way to determine what parameter values to use for accurate prediction of the behavior of a proposed ground plane 111, [2]. To calculate the ground impedance, numerical techniques such as the moment method and the finite element method must be used. For large ground planes, however, these numerical techniques cannot be used because of the required computation time [ 31. We have recently tried dividing the ground planes into small cells which size is determined by the moment method, and representing them as lumped element networks, consisting of inductors, capacitors, and resistances. The ground plane impedances can be analyzed with a general-purpose network analysis program by connecting lumped element network with each other.