{"title":"Performance Analysis of RTL to GDS-II Flow in Opensource Tool Qflow and Commercial Tool Cadence Encounter for Synchronous FIFO","authors":"Deep Acharya, U. Mehta","doi":"10.1109/EDKCON56221.2022.10032906","DOIUrl":null,"url":null,"abstract":"Open-source tool Qflow is a toolchain that comprises of popular and efficient tool which is used to perform RTL to GDS-II flow for digital designs. Students and researchers can use this open-source tool for their projects and get an idea about the actual physical design flow. A commercial tool like Cadence Encounter requires a high-cost license for chip design. So, it is generally used by the industry for good efficiency and higher accuracy. Here, the RTL to GDS-II flow is performed for Synchronous FIFO. In Synchronous FIFO, both read and write operations are operated with a single clock. This study illustrates the RTL to GDS-II flow of Synchronous FIFO using the open-source tool Qflow and Cadence Encounter. The entire RTL to GDS-II flow for the synchronous FIFO is carried out for the 180nm technology. Both tools use different foundries for standard cells and PDKs. The design’s performance is compared based on the highest operating frequency, area requirements, and power requirement. As a result, the number of cells required in the case of the Qflow tool is 1.5x greater than in the case of Cadence Encounter. The area requirement of the Qflow design is more than 2.6x that of Cadence Encounter.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDKCON56221.2022.10032906","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Open-source tool Qflow is a toolchain that comprises of popular and efficient tool which is used to perform RTL to GDS-II flow for digital designs. Students and researchers can use this open-source tool for their projects and get an idea about the actual physical design flow. A commercial tool like Cadence Encounter requires a high-cost license for chip design. So, it is generally used by the industry for good efficiency and higher accuracy. Here, the RTL to GDS-II flow is performed for Synchronous FIFO. In Synchronous FIFO, both read and write operations are operated with a single clock. This study illustrates the RTL to GDS-II flow of Synchronous FIFO using the open-source tool Qflow and Cadence Encounter. The entire RTL to GDS-II flow for the synchronous FIFO is carried out for the 180nm technology. Both tools use different foundries for standard cells and PDKs. The design’s performance is compared based on the highest operating frequency, area requirements, and power requirement. As a result, the number of cells required in the case of the Qflow tool is 1.5x greater than in the case of Cadence Encounter. The area requirement of the Qflow design is more than 2.6x that of Cadence Encounter.