A 30.5 GHz fully integrated frequency synthesizer in SiGe BiCMOS for 61 GHz and 122 GHz radar applications

M. Kucharski, A. Ergintav, F. Herzel, D. Kissinger, H. Ng
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引用次数: 1

Abstract

This paper presents a fully integrated millimeter-wave phase-locked loop (PLL) frequency synthesizer fabricated in 130nm BiCMOS technology. It comprises a self-buffered voltage controlled oscillator (VCO) tunable from 29.4 to 33.0 GHz, which corresponds to 11.5% tuning range. The VCO contains a programmable binary weighted varactor bank for phase noise reduction due to configurable low VCO gain. A programmable 4-bit charge pump (CP) was designed in order to compensate for VCO gain variation. It provides fast switching and shows low mismatch between UP and DN currents. The measured phase noise of the PLL is −85 dBc/Hz and −100 dBc/Hz at 150 kHz and 1MHz offset from the carrier, respectively. The circuit draws 60mA from 3.3 V supply. It is demonstrated that the presented chip can be successfully used in FMCW radar applications.
用于61 GHz和122 GHz雷达应用的SiGe BiCMOS 30.5 GHz全集成频率合成器
提出了一种采用130纳米BiCMOS技术制作的全集成毫米波锁相环频率合成器。它包括一个自缓冲压控振荡器(VCO),可在29.4至33.0 GHz范围内调谐,对应于11.5%的调谐范围。由于可配置的低VCO增益,该VCO包含一个可编程的二进制加权变容器组,用于相位噪声降低。为了补偿压控振荡器的增益变化,设计了可编程的4位电荷泵(CP)。它提供快速切换,显示UP和DN电流之间的低失配。在载波偏移150 kHz和1MHz时,测得锁相环的相位噪声分别为−85 dBc/Hz和−100 dBc/Hz。该电路从3.3 V电源中吸取60mA。实验结果表明,该芯片可以成功地应用于FMCW雷达。
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