Optimization of the write algorithm at low-current (10μA) in Cu/Al2O3-based conductive-bridge RAM

Abstract

In this paper we engineer the programming method at 10μA in Cu/Al2O3-based CBRAM to reduce the bit dispersion and the state instability over time. Despite its large median value, the overall HRS/LRS ratio in these devices can be drastically reduced due to the LRS and HRS dispersion, especially in a low-current regime. For this reason, in this study we adopt a statistical approach, focusing on the tails of the cumulative distribution Function (CDF). Using different verify-based algorithms we force an initial tail-to-tail (1st percentile of CDF) resistive window, demonstrating that, in order to reduce the total programming time, a complete Write/Erase cycle must be performed at each verify step. We also prove that the stability of the programmed LRS/HRS states is affected by the programming pulse width (PW) used in the algorithm. Selecting the appropriate PW, no overlap of the LRS and HRS distributions is observed after 1 week at room temperature.