A single chip dependable and adaptable payload Data Processing Unit

Abstract

The current state-of-the-art space-grade reconfigurable SRAM FPGAs provide unprecedented levels of integration and performance and advanced features previously available only to commercial developers such as dynamic partial reconfiguration. On-board payload data processing based on an adaptable SRAM FPGA based hardware platform offers unique advantages over both one-time programmable anti-fuse FPGAs and ASICs, enabling an adaptable instrument with significant savings in mass, power, cost, resources and flexibility. In this paper, for the first time, we integrate the instrument system supervisor processor along with dedicated, adaptable and high-performance on-board data processing functions in a single-chip, dependable and adaptable payload Data Processing Unit (DPU), based on the space-grade Xilinx Virtex-5QV FPGA. The introduced single-chip DPU supports self-configuration management without the requirement of an external configurator/scrubber. Furthermore, a system-level SEE mitigation strategy is proposed that employs EDAC, TMR and internal scrubbing to guarantee total immunity under extremely harsh radiation environments. The functionality of the proposed single-chip DPU is validated using a hardware demonstrator platform that hosts the commercial equivalent (XC5VFX130T) of the space-grade Xilinx Virtex-5QV FPGA.