Phase Dependent Voltage Contrast - An Inexpensive SEM Addition for LSI Failure Analysis

Abstract

A simple and inexpensive SEM voltage contrast technique has been developed which displays die-level logic-state information by distinguishing between in- and out-of-phase signals with respect to a reference signal. The technique as currently implemented also permits on-chip delay measurements down to 75 ns with ±10% resolution. Electron beam blanking is not required.