An ultra-low overhead LUT-based PUF for FPGA

Jiadong Wang, Aijiao Cui, Mengyang Li, G. Qu, Huawei Li
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引用次数: 4

Abstract

Physical unclonable function (PUF) utilizes the unexpected intrinsic manufacturing process variations of device to generate unique bit streams for authentication, key generation and random number generation. It has emerged as a promising primitive to address various challenges in hardware security. Traditional PUF schemes, such as arbiter PUF and ring oscillator (RO) PUF, do not have efficient implementations on FPGA and thus limit their usage as FPGA becomes the dominate design platform for today's emerging applications. In this paper, we propose a novel look-up table (LUT) shift register (SR) based PUF scheme for FPGA. This PUF incurs ultra1-low resource overhead, only two SLICEs to produce a 128-bit signature in our experimentation on XILINX Virtex-5 FPGA. Meanwhile, the PUF response are good in terms of uniqueness and robustness. At the same temperature, the proposed PUF has a 99%+ reliability on its response. When temperature changes between 25°C and 75°C, the robustness drops, but is still over 90%.
一种用于FPGA的超低开销lut PUF
物理不可克隆功能(PUF)利用设备的非预期内在制造过程变化来生成唯一的比特流,用于身份验证、密钥生成和随机数生成。它已成为解决硬件安全方面各种挑战的有前途的原语。传统的PUF方案,如仲裁PUF和环形振荡器(RO) PUF,在FPGA上没有有效的实现,因此限制了它们的使用,因为FPGA成为当今新兴应用的主导设计平台。在本文中,我们提出了一种新的基于查找表(LUT)移位寄存器(SR)的FPGA PUF方案。在XILINX Virtex-5 FPGA上的实验中,这种PUF产生的资源开销极低,只需两个slice就可以产生128位签名。同时,PUF响应具有较好的唯一性和鲁棒性。在相同温度下,该PUF的响应可靠性达到99%以上。当温度在25℃~ 75℃之间变化时,鲁棒性下降,但仍在90%以上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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