A Comparison Among Different Staggered Optimized Gating Patterns for Asymmetric Single-Phase Current Source Inverters

Abstract

In previous work, it was proposed to use multilevel current source converters to increase the current capacity as well as improve the harmonic profile of medium voltage and high current drives. Recent publications suggest that both (a) its intrinsic booster characteristics and (b) its easy way to handle independent DC sources operating in parallel make this topology an attractive alternative for the direct connection of photovoltaic plants to the grid. Furthermore, staggered optimized patterns were proposed together to modular topologies regarding the improvement on harmonic profile of injected currents to the grids. One of these techniques are the staggered Selective Harmonic Elimination. An alternative is the straightforward optimization for reduce the error among a time-based reference and the modulated current pattern. This work presents a comparison between three optimized patterns for the operation of staggered patterns in current source converters, for both symmetric and asymmetric cases. Theoretical results that are validated by simulation are presented.