Investigation of stress singularity fields and stress intensity factors for interfacial delamination (an application of thermosetting polyimide for a tapeless lead-on-chip (LOC) package)

Abstract

The reliability of semiconductor devices and packages used in microelectronics is compromised by interfacial delamination and homogenous cracking that is initiated at the edge of the interface between dissimilar materials during processing and stress tests. These failures have certain characteristics in that they begin at the stress singularity point. The knowledge of interfacial fracture mechanics is very important to the design for reliability of these devices and packages. In this paper, a model of stress singularity is proposed and applications of the model for the characterization of interfaces are subsequently presented. Examples are integrated circuit (IC) device interfaces and plastic package interfaces. These interfaces were mainly characterized with the order of stress singularity. Furthermore, this study demonstrates applications of the stress intensity factors for the stress singularity fields. The stress intensity factors were obtained from a r-/spl theta/ coordinate system, the order of stress singularity, the Dunders' parameters, and the extrapolation as a function of distance. The relationship between the stress intensity factors and the interfacial fracture toughness strength as a function of mode mixity was also investigated for delamination at the edge of the interface. The proposed numerical scheme was verified by the experiments on the lead-on-chip (LOC) package delamination in a soldering process.