Tingting Shi, Sijian Hou, Ping Luo, Ruhui Yang, Jun Chen, Shaowei Zhen, Bo Zhang
{"title":"A low power and high precision DAC in 0.13µm CMOS for DVS system","authors":"Tingting Shi, Sijian Hou, Ping Luo, Ruhui Yang, Jun Chen, Shaowei Zhen, Bo Zhang","doi":"10.1109/ICCCAS.2010.5581929","DOIUrl":null,"url":null,"abstract":"A low power and high precision digital to analog converter (DAC) for Dynamic Voltage Scaling (DVS) system is presented and demonstrated in this paper. Based on conventional resistor string architecture, the DAC is compensated by digitally controlled on-resistance network to improve output precision. The proposed 5-bit DAC can produce 0.7V∼1.475V, 25mV per step voltage as programmable reference in DVS system. The DAC is implemented by 0.13µm CMOS technology. The static power dissipation is 26.4µW when the power supply voltage is 3.3V and the reference voltage is 0.61V. The simulation results show that the output error is decreased from 5.64mV to 0.43mV after digital calibration. The conversion speed is less than 2.5µs; the digital input code transition frequency of the proposed DAC can reach 400K Hz. The performance satisfies the requirement of DVS system.","PeriodicalId":199950,"journal":{"name":"2010 International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"12 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Communications, Circuits and Systems (ICCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCAS.2010.5581929","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A low power and high precision digital to analog converter (DAC) for Dynamic Voltage Scaling (DVS) system is presented and demonstrated in this paper. Based on conventional resistor string architecture, the DAC is compensated by digitally controlled on-resistance network to improve output precision. The proposed 5-bit DAC can produce 0.7V∼1.475V, 25mV per step voltage as programmable reference in DVS system. The DAC is implemented by 0.13µm CMOS technology. The static power dissipation is 26.4µW when the power supply voltage is 3.3V and the reference voltage is 0.61V. The simulation results show that the output error is decreased from 5.64mV to 0.43mV after digital calibration. The conversion speed is less than 2.5µs; the digital input code transition frequency of the proposed DAC can reach 400K Hz. The performance satisfies the requirement of DVS system.