An architectural approach for reconfigurable industrial I/O devices

Daniel Kirschberger, Holger Flatt, J. Jasperneite
{"title":"An architectural approach for reconfigurable industrial I/O devices","authors":"Daniel Kirschberger, Holger Flatt, J. Jasperneite","doi":"10.1109/ReConFig.2014.7032500","DOIUrl":null,"url":null,"abstract":"This paper presents an architecture concept for reconfigurable industrial I/O devices. In order to avoid the use of special hardware modules as well as to offload the PLC from real-time preprocessing of sensor data, these tasks are shifted into the reconfigurable I/O device. Therefore, an FPGA based architecture template is proposed that supports loading of application-specific functions into the I/O device at runtime. The architecture template is partitioned into a static part and several reconfigurable slots. While the static part implements all fixed design elements, like the communication with the field bus and the in-system CPU, all application-specific functions are mapped onto the reconfigurable slots. In order to perform the reconfiguration of application-specific functions at runtime, the partial reconfiguration technology of modern FPGAs is used. The proposed concept is evaluated by mapping a case study with four reconfigurable slots onto a Xilinx Zynq-7000 SoC. The results show that new application-specific functions can be flexibly loaded into the I/O device. The total reconfiguration process of exemplary application-specific functions requires up to 3 ms and cause down-times below 0.5 ms. This especially enables new control applications that can even change the preprocessing within I/O devices during cyclic data communication.","PeriodicalId":137331,"journal":{"name":"2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ReConFig.2014.7032500","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

This paper presents an architecture concept for reconfigurable industrial I/O devices. In order to avoid the use of special hardware modules as well as to offload the PLC from real-time preprocessing of sensor data, these tasks are shifted into the reconfigurable I/O device. Therefore, an FPGA based architecture template is proposed that supports loading of application-specific functions into the I/O device at runtime. The architecture template is partitioned into a static part and several reconfigurable slots. While the static part implements all fixed design elements, like the communication with the field bus and the in-system CPU, all application-specific functions are mapped onto the reconfigurable slots. In order to perform the reconfiguration of application-specific functions at runtime, the partial reconfiguration technology of modern FPGAs is used. The proposed concept is evaluated by mapping a case study with four reconfigurable slots onto a Xilinx Zynq-7000 SoC. The results show that new application-specific functions can be flexibly loaded into the I/O device. The total reconfiguration process of exemplary application-specific functions requires up to 3 ms and cause down-times below 0.5 ms. This especially enables new control applications that can even change the preprocessing within I/O devices during cyclic data communication.
可重构工业I/O设备的体系结构方法
本文提出了一种可重构工业I/O设备的体系结构概念。为了避免使用特殊的硬件模块以及减轻PLC对传感器数据实时预处理的负担,这些任务被转移到可重构的I/O设备中。因此,提出了一种基于FPGA的架构模板,支持在运行时将特定应用程序的功能加载到I/O设备中。将体系结构模板划分为一个静态部分和若干个可重构槽。虽然静态部分实现了所有固定的设计元素,如与现场总线和系统内CPU的通信,但所有特定于应用程序的功能都映射到可重构插槽上。为了在运行时对特定应用的功能进行重构,采用了现代fpga的局部重构技术。通过将具有四个可重构插槽的案例研究映射到Xilinx Zynq-7000 SoC上来评估所提出的概念。结果表明,新的特定于应用程序的功能可以灵活地加载到I/O设备中。典型应用程序特定功能的总体重新配置过程最多需要3毫秒,导致停机时间低于0.5毫秒。这使得新的控制应用程序甚至可以在循环数据通信期间改变I/O设备内的预处理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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