D.L. Smith, D. Fork, R. Thornton, A. Alimonda, C. Chua, C. Dunnrowicz, J. Ho
{"title":"Flip-chip bonding on 6-/spl mu/m pitch using thin-film microspring technology","authors":"D.L. Smith, D. Fork, R. Thornton, A. Alimonda, C. Chua, C. Dunnrowicz, J. Ho","doi":"10.1109/ECTC.1998.678714","DOIUrl":null,"url":null,"abstract":"Bonding-pad densities on high-performance integrated-circuit chips are beginning to exceed the limits of available interconnect technologies. Also, stresses due to thermal mismatch in flip-chipped packages are reducing time to contact failure. We have addressed both of these problems by microlithographically fabricating highly elastic cantilever springs in linear arrays on pitches down to 6 /spl mu/m. We have soldered test arrays of 52 springs on this pitch to Si chips with 100% contact yield and good solder wetting to every spring. The fine-pitch capability also facilitates off-chip routing; the very high compliance of the springs should avoid thermal fatigue; and the low thermal conductance along the springs should allow fast-cycle soldering of chips to multichip modules as well as replacement of chips subsequently testing faulty.","PeriodicalId":422475,"journal":{"name":"1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206)","volume":"92 4","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1998.678714","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 28
Abstract
Bonding-pad densities on high-performance integrated-circuit chips are beginning to exceed the limits of available interconnect technologies. Also, stresses due to thermal mismatch in flip-chipped packages are reducing time to contact failure. We have addressed both of these problems by microlithographically fabricating highly elastic cantilever springs in linear arrays on pitches down to 6 /spl mu/m. We have soldered test arrays of 52 springs on this pitch to Si chips with 100% contact yield and good solder wetting to every spring. The fine-pitch capability also facilitates off-chip routing; the very high compliance of the springs should avoid thermal fatigue; and the low thermal conductance along the springs should allow fast-cycle soldering of chips to multichip modules as well as replacement of chips subsequently testing faulty.