A wideband fractional-N synthesizer with low effort adaptive phase noise cancellation for low-power short-range standards

Abstract

This paper presents a wideband low-spur fractional-N synthesizer with an adaptive noise cancellation technique. By adopting the classical loop filter, the ΣΔ quantization noise as well as the spurs are compensated with simple calibration circuits. The synthesizer is fully integrated in 130nm CMOS technology, consuming 0.33mm2 area and 8.3mW core power. It operates at 1.8 GHz carrier frequency with 1MHz bandwidth. The out-band phase noise is -129 dBc/Hz at 3MHz offset, the reference spur is -68 dBc, and the worst inband fractional spur is -56 dBc.