Sang-Hoon Lee, Chang-hoon Choi, J. Kong, Wong-Seong Lee, Jei-Hwan Yoo
{"title":"An efficient statistical analysis methodology and its application to high-density DRAMs","authors":"Sang-Hoon Lee, Chang-hoon Choi, J. Kong, Wong-Seong Lee, Jei-Hwan Yoo","doi":"10.1109/ICCAD.1997.643611","DOIUrl":null,"url":null,"abstract":"A new approach for the statistical worst case of fall-chip circuit performance and parametric yield prediction, using both the modified-principal component analysis (MPCA) and the gradient method (GM), is proposed and verified. This method enables designers not only to predict the standard deviations of circuit performances but also track the circuit performances associated with the process shift using wafer test structure measurements. This new method is validated experimentally during the development and production of high density DRAMs.","PeriodicalId":187521,"journal":{"name":"1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1997.643611","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
A new approach for the statistical worst case of fall-chip circuit performance and parametric yield prediction, using both the modified-principal component analysis (MPCA) and the gradient method (GM), is proposed and verified. This method enables designers not only to predict the standard deviations of circuit performances but also track the circuit performances associated with the process shift using wafer test structure measurements. This new method is validated experimentally during the development and production of high density DRAMs.