Process design methodology for via-shape-controlled, copper dual-damascene interconnects in low-k organic film

K. Kinoshita, M. Tada, T. Usami, M. Hiroi, T. Tonegawa, K. Shiba, T. Onodera, M. Tagami, S. Saitoh, Y. Hayashi
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引用次数: 6

Abstract

By dual hard mask (dHM) process combined with sidewall-hardening etching step, copper dual-damascene (DD) interconnects are fabricated in low-k organic film without any etch-stop layers under the trench. Careful designs of dHM structures and their patterning sequence enable us to harden the via-sidewall by fluorocarbon plasma, which is a key to reduce final via-shoulder loss at the via/trench connecting region. The low-k structure has low via resistance such as 0.65 /spl Omega//0.28 /spl mu/m/sup /spl phi//-via while keeping the large tolerance of misalignment in via/trench, appreciable for 0.1 /spl mu/m-generation CMOS ULSIs.
低钾有机薄膜中孔型控制铜双大马士革互连的工艺设计方法
采用双硬掩膜(dHM)工艺结合侧壁硬化蚀刻步骤,在低钾有机薄膜中制备了铜双砷(DD)互连,在沟槽下不需要任何刻蚀停止层。dHM结构及其图案顺序的精心设计使我们能够通过氟碳等离子体硬化通孔侧壁,这是减少通孔/沟槽连接区域最终通孔肩损失的关键。低k结构具有0.65 /spl Omega//0.28 /spl mu/m/sup /spl phi//-via等低通孔电阻,同时在通孔/沟槽中保持较大的偏差容限,对于0.1 /spl mu/m一代CMOS ulsi来说非常明显。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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