Cell-based design of a VLSI cellular sorter

Abstract

A description is given of the logical and physical design of a VLSI bit-serial/word-serial cellular automata-based sorter. The sorting mechanism is based on the concurrent operation of a number of tesselation-like automata called cellular logic gates (CLGs). The VLSI circuit that implements the sorting scheme consists of modules of predesigned and precharacterized cells organized in two levels of hierarchy: cellular automata cells and CLGs. The former consist of a memory element and a combinational logic element that constitutes the leaf cells of the cell-based design.<>