Trigger-wave propagation in arbitrary metrics in asynchronous cellular logic arrays

P. Mroszczyk, P. Dudek
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引用次数: 3

Abstract

This paper presents the idea of an asynchronous cellular pixel-parallel logic array for global image processing tasks using trigger-wave propagation in a medium with a hardware-controlled metric. The principles of wave propagation in cellular four-connected logic arrays emulating different distance measure norms are explained and verified using a simplified switched RC circuit model. The proposed gate array consists of only 13 transistors per pixel and was implemented in a standard 90 nm CMOS technology. It provides the propagation medium applicable for binary image skeletonization, Voronoi tessellation or distance transformation tasks where calculating distances in a particular metric (e. g. Euclidean, Manhattan, Chessboard, etc.) is desired.
异步蜂窝逻辑阵列中任意度量的触发波传播
本文提出了一种异步单元像素并行逻辑阵列的思想,用于全局图像处理任务,使用触发波在具有硬件控制度量的介质中传播。利用简化的开关RC电路模型,解释了不同距离测量规范下蜂窝四连逻辑阵列中的波传播原理,并对其进行了验证。所提出的门阵列每像素只有13个晶体管,并在标准的90纳米CMOS技术中实现。它提供了适用于二进制图像骨架化,Voronoi镶嵌或距离变换任务的传播介质,其中计算特定度量(例如欧几里得,曼哈顿,棋盘等)的距离是必需的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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