Vertical Slit Field Effect Transistor in ultra-low power applications

Xiang Qiu, M. Marek-Sadowska, W. Maly
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引用次数: 10

Abstract

Vertical Slit Field Effect Transistors (VeSFETs) are novel twin-gate and junction-less devices with nearly ideal sub-threshold swing and manufactured using SOI infrastructure. In this paper, we analyze VeSFETs as potential components of ultra-low power circuits. We compare circuits built with VeSFETs, FinFETs, and bulk-MOSFETs, all in 65nm technology node. Our experiments demonstrate that VeSFET has the smallest intrinsic capacitance and the lowest minimum energy among the studied devices. The Tied-Gate (TG) VeSFET-based circuit operating at the minimum energy point achieves a lower energy and a higher frequency than its Independent-Gate (IG) VeSFET-based counterpart. IG VeSFET achieves lower energy for circuits working at extremely low and relatively wide frequency range.
超低功耗应用中的垂直狭缝场效应晶体管
垂直狭缝场效应晶体管(vesfet)是一种新型的双栅极无结器件,具有接近理想的亚阈值摆幅,采用SOI基础结构制造。本文分析了vesfet作为超低功耗电路的潜在元件。我们比较了用vesfet、finfet和大块mosfet构建的电路,它们都采用65nm技术节点。实验表明,在所研究的器件中,VeSFET具有最小的固有电容和最小能量。在最小能量点工作的基于束缚门(TG)的vesfet电路比基于独立门(IG)的vesfet获得更低的能量和更高的频率。对于工作在极低和相对宽的频率范围内的电路,IG VeSFET实现了较低的能量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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