{"title":"Vertical Slit Field Effect Transistor in ultra-low power applications","authors":"Xiang Qiu, M. Marek-Sadowska, W. Maly","doi":"10.1109/ISQED.2012.6187522","DOIUrl":null,"url":null,"abstract":"Vertical Slit Field Effect Transistors (VeSFETs) are novel twin-gate and junction-less devices with nearly ideal sub-threshold swing and manufactured using SOI infrastructure. In this paper, we analyze VeSFETs as potential components of ultra-low power circuits. We compare circuits built with VeSFETs, FinFETs, and bulk-MOSFETs, all in 65nm technology node. Our experiments demonstrate that VeSFET has the smallest intrinsic capacitance and the lowest minimum energy among the studied devices. The Tied-Gate (TG) VeSFET-based circuit operating at the minimum energy point achieves a lower energy and a higher frequency than its Independent-Gate (IG) VeSFET-based counterpart. IG VeSFET achieves lower energy for circuits working at extremely low and relatively wide frequency range.","PeriodicalId":205874,"journal":{"name":"Thirteenth International Symposium on Quality Electronic Design (ISQED)","volume":"340 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Thirteenth International Symposium on Quality Electronic Design (ISQED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2012.6187522","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
Vertical Slit Field Effect Transistors (VeSFETs) are novel twin-gate and junction-less devices with nearly ideal sub-threshold swing and manufactured using SOI infrastructure. In this paper, we analyze VeSFETs as potential components of ultra-low power circuits. We compare circuits built with VeSFETs, FinFETs, and bulk-MOSFETs, all in 65nm technology node. Our experiments demonstrate that VeSFET has the smallest intrinsic capacitance and the lowest minimum energy among the studied devices. The Tied-Gate (TG) VeSFET-based circuit operating at the minimum energy point achieves a lower energy and a higher frequency than its Independent-Gate (IG) VeSFET-based counterpart. IG VeSFET achieves lower energy for circuits working at extremely low and relatively wide frequency range.