A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI

Abstract

We propose an automotive-grade ARM¯ Cortex¯-R4F core SoC in 28nm FD-SOI that optimizes its energy across 11X frequency-wide Operational Performance Points (OPPs) by combining Adaptive Voltage Scaling (AVS), Adaptive Body-Biasing (ABB) and Bias-in-Memory-Array (BiMA); with a 3mV/bit Tunable Replica Circuit (TRC) for safety, embedded power regulation and compensation. The reported techniques respectively improve by, 21X performance, 120mV lower VMIN , and 8X lifetime, the Low-Power, Mid-, and High-Performance OPPs. Results have been measured at extreme conditions, covering SS/TT/FF process, 0.5/1.2V, −40/150°C, and EOL aging.