High speed low power composite field SBOX

Abstract

High speed and low power SBOX for Advanced Encryption Standard (AES) is proposed in this paper. Composite Galois Field is used in SBOX architecture to reduce size and delay of the circuit. Transmission gate is employed to reduce power consumption of the circuit. The proposed SBOX architecture consumes 186µw at 10MHz. The delay is reduced by 28.1%, and the average power consumption is reduced by 68.8% as compared to CMOS standard cell composite field design.