Investigation of the intrinsic SiO/sub 2/ area dependence using TDDB testing

Abstract

To date, there has been very little comprehensive work done on the area dependence of MOS capacitors using time dependent dielectric breakdown testing. The area dependence was investigated by Sune et al. (Thin Solid Films vol. 185, pp. 347-362, 1990) and it indicated that it existed for Q/sub bd/ and potentially for TDDB. Recent work at IRPS'97 tutorials also indicated the same TDDB dependence but these investigations were limited by either the range of areas investigated or the range of test conditions used. This paper provides a thorough investigation into oxide area dependence over 5 orders of magnitude using multiple temperatures and electric fields in order to understand the breakdown mechanism, failure statistics, and model the area dependency. The paper outlines the structures tested, and the thermal and field acceleration factors generated for different area sizes. It also outlines the reason for the area dependence and indicates how existing models must be modified to account for this dependency when predicting product reliability. The area analysis was conducted on flat P-type capacitors and on some NMOS structures to increase the area spread being investigated. The capacitors and transistors were fabricated on a 0.6 /spl mu/m dual poly dual metal CMOS process with a target deposited oxide thickness of 125 /spl Aring/. The process had been extensively characterized and monitored since release and all monitored lots showed only an intrinsic distribution.