C. Portmann, A. Chu, N. Hays, S. Sidiropoulos, D. Stark, P. Chau, K. Donnelly, B. Garlepp
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引用次数: 9
Abstract
A DLL design and porting methodology have been described to enable multiple vendors to create a 400 MHz DLL from a template design in a 0.25 /spl mu/m, 64 Mb DRAM process.