Generation and Elimination of Antenna Effect

Abstract

Yield and reliability in exascale ICs have been important concerns for IC manufacturers, and precise feature sizes for advanced ICs are often achieved using plasma processes. However, the plasma process charges the conductive components during the back-end process implementation, and extensive studies have shown that the charging current affects the gate oxide quality, a problem known as the antenna effect, also known as plasma-induced loss. In this paper, we summarize the mechanism and degree of damage of PID occurring in conventional bulk silicon CMOS processes, advanced node processes, and special processes based on previous scholarly research. Finally, this paper collates improvement measures, and it is also a question worth exploring how to optimize more effectively in large scale projects.