Collaborative gate implementation selection and adaptivity assignment for robust combinational circuits

Abstract

Adaptive design is a power-efficient approach to variation resilience in VLSI circuits. However, its implementation, especially that of fine-grained adaptivity, can easily result in large overhead. Although numerous previous works have demonstrated the effectiveness of adaptive design, very few works have emphasized its overhead control. In order to make adaptive design a truly practical approach, we develop a method that systematically optimizes adaptivity assignment with consideration of overhead reduction. At the same time, a variability aware gate implementation selection technique is investigated and applied in conjunction with the adaptivity assignment. Experimental results on benchmark circuits indicate that our approach can greatly decrease adaptivity overhead while satisfy performance and robustness constraints.