On the impact of buffer size on packet loss in adaptable network-on-chips for runtime reconfigurable system-on-chips

Abstract

This paper explores the interdependencies between buffer size, throughput, latency and packet loss in runtime adaptable network-on-chips. Based on the SystemC simulation model of a runtime reconfigurable system-on-chip, buffer sizes of switches and of network interfaces were adjusted to find the optimal relation between throughput, latency and packet loss. A synthetic traffic generator parameterised according to characteristics of traffic patterns in networking applications provides the stimulus for the simulation. Simulation results show that buffers for only a few packets are required within the system while most buffer memory should be provided at the system gateway.