A novel memory array based on an annular single-poly EPROM cell for use in standard CMOS technology

Abstract

Within the scope of non-volatile memories, CMOS compatibility and portability are serious issues. We describe here an edgeless single-poly floating gate p-channel memory cell, which can be embedded into a novel memory array architecture. It features high electrical performance together with a robustness with respect to the process. It has been processed in a 0.18 /spl mu/m HCMOS technology from STMicroelectronics, Crolles.