M. Rebaudengo, M. Reorda, M. Violante, P. Cheynet, B. Nicolescu, R. Velazco
{"title":"Evaluating the effectiveness of a software fault-tolerance technique on RISC- and CISC-based architectures","authors":"M. Rebaudengo, M. Reorda, M. Violante, P. Cheynet, B. Nicolescu, R. Velazco","doi":"10.1109/OLT.2000.856606","DOIUrl":null,"url":null,"abstract":"This paper deals with a method able to provide a microprocessor-based system with safety capabilities by modifying the source code of the executed application, only. The method exploits a set of transformations which can automatically be applied, thus greatly reducing the cost of designing a safe system, and increasing the confidence in its correctness. Fault Injection experiments have been performed on a sample application using two different systems based on CISC and RISC processors. Results demonstrate that the method effectiveness is rather independent of the adopted platform.","PeriodicalId":334770,"journal":{"name":"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/OLT.2000.856606","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
This paper deals with a method able to provide a microprocessor-based system with safety capabilities by modifying the source code of the executed application, only. The method exploits a set of transformations which can automatically be applied, thus greatly reducing the cost of designing a safe system, and increasing the confidence in its correctness. Fault Injection experiments have been performed on a sample application using two different systems based on CISC and RISC processors. Results demonstrate that the method effectiveness is rather independent of the adopted platform.