{"title":"Design of a Bandgap Reference Circuit with Trimming for Operation at Multiple Voltages and Tolerant to Radiation in 90nm CMOS Technology","authors":"E. Vilella, Á. Diéguez","doi":"10.1109/ISVLSI.2010.64","DOIUrl":null,"url":null,"abstract":"The present article describes the design of a new low-voltage radiation-tolerant band gap reference circuit. The proposed circuit has been designed for biasing analog modules in the slow control of the Data Handling Processor for reading DEPFET sensors in the Super KEK-B particle accelerator in Japan. It has been implemented in a 90nm standard CMOS technology. The BGR circuit provides a sub-1V voltage reference. It is possible to operate the circuit with 1 and 1.2V supplies. For that, a trimming net based on resistors was included. Tolerance to radiation is achieved by means of enclosed layout transistors and guard rings. The total area of the BGR is 181x110μm2. The power consumption is set at 18.70uA for the 1V supply case and at 55.18uA for the 1.2V supply case.","PeriodicalId":187530,"journal":{"name":"2010 IEEE Computer Society Annual Symposium on VLSI","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Computer Society Annual Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2010.64","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The present article describes the design of a new low-voltage radiation-tolerant band gap reference circuit. The proposed circuit has been designed for biasing analog modules in the slow control of the Data Handling Processor for reading DEPFET sensors in the Super KEK-B particle accelerator in Japan. It has been implemented in a 90nm standard CMOS technology. The BGR circuit provides a sub-1V voltage reference. It is possible to operate the circuit with 1 and 1.2V supplies. For that, a trimming net based on resistors was included. Tolerance to radiation is achieved by means of enclosed layout transistors and guard rings. The total area of the BGR is 181x110μm2. The power consumption is set at 18.70uA for the 1V supply case and at 55.18uA for the 1.2V supply case.