Design of a Bandgap Reference Circuit with Trimming for Operation at Multiple Voltages and Tolerant to Radiation in 90nm CMOS Technology

E. Vilella, Á. Diéguez
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引用次数: 2

Abstract

The present article describes the design of a new low-voltage radiation-tolerant band gap reference circuit. The proposed circuit has been designed for biasing analog modules in the slow control of the Data Handling Processor for reading DEPFET sensors in the Super KEK-B particle accelerator in Japan. It has been implemented in a 90nm standard CMOS technology. The BGR circuit provides a sub-1V voltage reference. It is possible to operate the circuit with 1 and 1.2V supplies. For that, a trimming net based on resistors was included. Tolerance to radiation is achieved by means of enclosed layout transistors and guard rings. The total area of the BGR is 181x110μm2. The power consumption is set at 18.70uA for the 1V supply case and at 55.18uA for the 1.2V supply case.
90nm CMOS多电压耐辐射带隙基准电路的设计
本文介绍了一种新型低电压容辐射带隙参考电路的设计。该电路已被设计用于日本超级KEK-B粒子加速器中读取DEPFET传感器的数据处理处理器慢速控制中的偏置模拟模块。它已在90纳米标准CMOS技术中实现。BGR电路提供了一个低于1v的参考电压。可以用1和1.2V电源操作电路。为此,一个基于电阻的修整网被包括在内。对辐射的容忍度是通过封闭布局晶体管和保护环来实现的。BGR的总面积为181x110μm2。1V供电情况下功耗设置为18.70uA, 1.2V供电情况下功耗设置为55.18uA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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