Asymmetric Prefetching Architecture for Multicore Processor

Duheon Choi, Kwangsub Kim, Eui-Young Chung
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引用次数: 1

Abstract

Prefetching is one of the main techniques for improving the performance of modern processors. Various prefetch algorithms have been proposed targeting various applications and memory access patterns. Modern SoCs are mainly equipped with multicore processors, and various processes are operated separately by each core. This implies that for each core, different prefetcher may work better. In this paper, we propose a hardware prefetcher that integrates three prefetching algorithms and statically allocates a prefetching algorithm that provides better performance to each workload in a multicore processor. We observe 4.6% overall performance improvement compared to using a single prefetcher and reduce buffer resources by 41%.
多核处理器的非对称预取结构
预取是提高现代处理器性能的主要技术之一。针对不同的应用和内存访问模式,提出了不同的预取算法。现代soc主要配备多核处理器,各种进程由每个核心单独操作。这意味着对于每个核心,不同的预取器可能工作得更好。在本文中,我们提出了一种硬件预取器,它集成了三种预取算法,并静态地分配一种预取算法,为多核处理器中的每个工作负载提供更好的性能。我们观察到,与使用单个预取器相比,总体性能提高了4.6%,缓冲区资源减少了41%。
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