QCA system design using blocks with vertically stacked active elements

Abstract

Quantum Dot Cellular Automata is one among the various technologies proposed by the International Technology Roadmap for Semiconductors (ITRS) as a viable alternative to CMOS. Circuits designed in QCA are potentially better with respect to speed, power and area when compared to their counter parts in CMOS. But as the circuit complexity increases, there is a linear growth in the horizontal area leading to lengthier interconnects with increased delay. To circumvent this problem we propose a new design paradigm using vertically stacked QCA cells. As the active elements are placed right one above the other in this new approach, the number of cells used for the interconnection will be drastically reduced. Thus would result in very compact designs. This technique provides greater flexibility in routing due to the availability of both vertical and horizontal planes. Each majority gate which forms the basic element of a QCA circuit/Block is implemented in a different layer; hence it explores a new concept of reusability in QCA along with the reduction of time for determination of errors. In this paper we establish this idea with the design of adders, subtractors, ripple adders, ripple adder cum subtractors using vertically stacked QCA circuits. These circuits are implemented using the least number of cells and minimum clocking zones. Results obtained by simulation show a maximum reduction in the number of cells used for the overall design by 77% and the cells used for the interconnection by 90% in comparison to their primitive counterparts respectively.