Ultra-Low Power Subthreshold Quasi Floating Gate CMOS Logic Family for Energy Harvesting

M. P. Garde, A. López-Martín, D. Orradre, J. Ramírez-Angulo
{"title":"Ultra-Low Power Subthreshold Quasi Floating Gate CMOS Logic Family for Energy Harvesting","authors":"M. P. Garde, A. López-Martín, D. Orradre, J. Ramírez-Angulo","doi":"10.1109/PATMOS.2018.8463995","DOIUrl":null,"url":null,"abstract":"Subthreshold digital circuits are suitable for application niches where high performance is not required, but extremely low power consumption is a must. One of the most relevant applications of this kind nowadays is energy harvesting, where self-powered devices experience severe energy constraints. In this paper, a subthreshold CMOS logic family is proposed based on the Quasi-Floating Gate transistor, aimed to the design of different subcircuits required in energy harvesting. Measurement results of a test chip prototype confirm the feasibility of this approach.","PeriodicalId":234100,"journal":{"name":"2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PATMOS.2018.8463995","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

Subthreshold digital circuits are suitable for application niches where high performance is not required, but extremely low power consumption is a must. One of the most relevant applications of this kind nowadays is energy harvesting, where self-powered devices experience severe energy constraints. In this paper, a subthreshold CMOS logic family is proposed based on the Quasi-Floating Gate transistor, aimed to the design of different subcircuits required in energy harvesting. Measurement results of a test chip prototype confirm the feasibility of this approach.
用于能量收集的超低功耗亚阈准浮门CMOS逻辑系列
亚阈值数字电路适用于不要求高性能,但必须极低功耗的应用领域。目前最相关的应用之一是能量收集,其中自供电设备经历严重的能量限制。本文提出了一种基于准浮栅晶体管的亚阈值CMOS逻辑系列,旨在设计能量收集所需的不同子电路。测试芯片样机的测量结果证实了该方法的可行性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信