M. P. Garde, A. López-Martín, D. Orradre, J. Ramírez-Angulo
{"title":"Ultra-Low Power Subthreshold Quasi Floating Gate CMOS Logic Family for Energy Harvesting","authors":"M. P. Garde, A. López-Martín, D. Orradre, J. Ramírez-Angulo","doi":"10.1109/PATMOS.2018.8463995","DOIUrl":null,"url":null,"abstract":"Subthreshold digital circuits are suitable for application niches where high performance is not required, but extremely low power consumption is a must. One of the most relevant applications of this kind nowadays is energy harvesting, where self-powered devices experience severe energy constraints. In this paper, a subthreshold CMOS logic family is proposed based on the Quasi-Floating Gate transistor, aimed to the design of different subcircuits required in energy harvesting. Measurement results of a test chip prototype confirm the feasibility of this approach.","PeriodicalId":234100,"journal":{"name":"2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PATMOS.2018.8463995","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Subthreshold digital circuits are suitable for application niches where high performance is not required, but extremely low power consumption is a must. One of the most relevant applications of this kind nowadays is energy harvesting, where self-powered devices experience severe energy constraints. In this paper, a subthreshold CMOS logic family is proposed based on the Quasi-Floating Gate transistor, aimed to the design of different subcircuits required in energy harvesting. Measurement results of a test chip prototype confirm the feasibility of this approach.