Line Coding for Clock Recovery With Minimal Filtering

Abstract

Line codes for clock recovery with minimal filtering are investigated. First, it is explained that a 4T processing is preferable to conventional 4T/2T processing for a 1B4B/3B4B code from the standpoint of jitter reduction. Then 2B/4B codes are proposed where 3T and IT processings are applicable. It is shown that these new codes can not only simplify hardware but also lead to improved jitter characteristic as compared with existing schemes.