Ranoyca Nayana Alencar Leao e Silva, L. Barreto, A. U. Barbosa, D. R. Joca, P. Praça
{"title":"Digital implementation of a modulation technique for a multilevel inverter on FPGA","authors":"Ranoyca Nayana Alencar Leao e Silva, L. Barreto, A. U. Barbosa, D. R. Joca, P. Praça","doi":"10.1109/INDUSCON.2012.6453513","DOIUrl":null,"url":null,"abstract":"This paper presents a digital implementation of the modulation technique based on the PD-PWM using a FPGA (Field Programmable Gate Array) with its logical structure developed through the VHDL language. The technique uses a modified modulation and two triangular carriers which it's applied to a five level hybrid multilevel inverter (based on the Half-Bridge and ANPC topologies). The experimental results validate both the digital development of the technique on FPGA and the presented inverter.","PeriodicalId":442317,"journal":{"name":"2012 10th IEEE/IAS International Conference on Industry Applications","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 10th IEEE/IAS International Conference on Industry Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDUSCON.2012.6453513","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents a digital implementation of the modulation technique based on the PD-PWM using a FPGA (Field Programmable Gate Array) with its logical structure developed through the VHDL language. The technique uses a modified modulation and two triangular carriers which it's applied to a five level hybrid multilevel inverter (based on the Half-Bridge and ANPC topologies). The experimental results validate both the digital development of the technique on FPGA and the presented inverter.