A gate-oxide-breakdown antifuse OTP ROM array based on TSMC 90nm process

Abstract

A one-time programmable (OTP) antifuse ROM array using MOSFET gate oxide breakdown, which is designed and fabricated under TSMC 90nm standard CMOS process, is presented in this paper. The breakdown voltage and breakdown time are measured. The schematic design of three-transistor antifuse OTP ROM array is exhibited. SPI bus is used to decrease the number of chip pads in practice. The experimental result shows that write & read function can be realized successfully.