0.39–0.45THz symmetric MOS-varactor frequency tripler in 65-nm CMOS

Abstract

A broadband passive frequency tripler using an accumulation-mode symmetric MOS varactor (SVAR) in 65-nm bulk CMOS process is demonstrated. The measured output power (Pout) is >-15dBm over a 57GHz band. This tripler incorporating an on-chip patch antenna operates at frequencies between 390 and 456GHz, and achieves a peak Effective Isotropically Radiated Power (EIRP) of -5dBm. The measurement setup limited peak Pout and conversion loss is -3.2dBm and 15.2dB, respectively at 447GHz after antenna gain de-embedding. This is the highest reported output power for all CMOS sources operating above 350GHz and can be integrated with an on-chip input driver amplifier.