{"title":"Switched Capacitor based High Positive and Negative Voltage Charge-pump using Sample and Hold technique","authors":"V. Rana, A. Mittal","doi":"10.1109/APCCAS.2018.8605637","DOIUrl":null,"url":null,"abstract":"A switched capacitor based high positive and negative voltage charge-pump using sample and hold technique is introduced. Circuit uses low voltage transistors, MOM capacitors and two-phase clock signals. As single circuit can generate both positive and negative voltages so we do not require huge on-chip capacitors separately for positive and negative charge-pump thus this circuit provides huge area saving. A self-timed clock is also generated to perform sample and hold process for this circuit. Another option is to use external clock for timing the sample and hold process. Circuit discuss about a single stage positive and negative voltage multiplier stage and four stage charge-pump system, which is designed and simulated in BCD-110nm technology with input supply of 2.5V. Circuit provides a voltage multiplication efficiency of 93% for positive voltage and 92% for negative voltages.","PeriodicalId":325141,"journal":{"name":"2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2018.8605637","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A switched capacitor based high positive and negative voltage charge-pump using sample and hold technique is introduced. Circuit uses low voltage transistors, MOM capacitors and two-phase clock signals. As single circuit can generate both positive and negative voltages so we do not require huge on-chip capacitors separately for positive and negative charge-pump thus this circuit provides huge area saving. A self-timed clock is also generated to perform sample and hold process for this circuit. Another option is to use external clock for timing the sample and hold process. Circuit discuss about a single stage positive and negative voltage multiplier stage and four stage charge-pump system, which is designed and simulated in BCD-110nm technology with input supply of 2.5V. Circuit provides a voltage multiplication efficiency of 93% for positive voltage and 92% for negative voltages.