A reconfigurable computing architecture using magnetic tunneling junction memories

Abstract

This work presents a new dynamically reconfigurable architecture that uses magnetic tunneling junctions to implement non-volatile reconfiguration memories. The magnetic-based storage elements further provide a very effective implementation of multi-context planes. The proposed architecture is organized as a 2-dimensional array of double precision floating-point run-time reconfigurable execution units. The configuration information defines the operation to be executed and the data flow intra and inter execution units. A prototype design of the coarse-grained reconfigurable array has been implemented targeting a 65nm CMOS technology. The obtained results confirm that the proposed architecture provides a significant computational density and that the magnetic memories provide a very area efficient multi-context based run-time reconfigurability.