Practical evaluation of DPA countermeasures on reconfigurable hardware

Abstract

In CHES 2010 a correlation-based power analysis collision attack has been introduced which is supposed to exploit any first-order leakage of cryptographic devices. This work examines the effectiveness of the well-known DPA countermea-sures versus the correlation collision attack. The considered countermeasures include masking, shuffling, and noise addition, when applied in hardware. Practical evaluations, which all have been performed using power traces measured from an FPGA board, show an increase in the number of required traces, e.g. from 10,000 to 1,500,000, when combining different counter-measures. This study allows for a fair comparison between the hardware countermeasures and helps identifying an appropriate key lifetime.