DC and Analog/RF Performance Comparison of Renovated GAA JLFET Structures

Abstract

In this paper, a comparative analysis is conducted among Dual Metal Gate-All-Around Junctionless Silicon FET (DMG GAA JLFET), a high-k spacer induced symmetrically underlapped GAA JLFET (SPACER GAA JLFET) and a stacked oxide-based GAA JLFET (SO GAA JLFET) architectures to find out the suitable structure for appropriate applications. The DC and Analog/R.F. performances of proposed devices are analyzed in terms of drain current, threshold voltage, electric field, surface potential, Subthreshold swing, intrinsic capacitances, transconductances, and cut-off frequency. A detailed simulation study of the proposed structures is performed with the SILVACO ATLAS 3-D device simulator. It has been observed that SPACER-induced GAA JLFET gives the best static performances, whereas DMG and SO GAA JLFET show some significant Analog/R.F. performance improvement than their counterpart.