WASP: a wafer-scale massively parallel processor

1990 Proceedings. International Conference on Wafer Scale Integration Pub Date : 1990-01-23 DOI:10.1109/ICWSI.1990.63880

R. Lea

引用次数: 13

Abstract

The new decade (1990-2000) heralds the age of very powerful compute-, graphics- and information-servers, based on Massively Parallel Processors (mppS), capable of TOPS (Tera Operations-Per-Second) performance in networked scientific, engineering, knowledge-base and artificial intelligence applications. This paper describes a WSI associative string processor (WASP) in CMOS fault-tolerant WSI MPP architecture which satisfies both the architectural and engineering requirements outlined and, thereby, offers a step-function improvement in cost-effectiveness compared with first-generation MPPs.<>

查看原文本刊更多论文

WASP:晶圆级大规模并行处理器

新的十年(1990-2000)预示着非常强大的计算、图形和信息服务器时代的到来，这些服务器基于大规模并行处理器(mppS)，能够在网络科学、工程、知识库和人工智能应用中实现TOPS(每秒次操作)性能。本文介绍了一种基于CMOS容错WSI MPP架构的WSI关联字符串处理器(WASP)，该处理器满足了所概述的架构和工程要求，因此与第一代MPP相比，在成本效益上有了一步一步的提高

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

1990 Proceedings. International Conference on Wafer Scale Integration

自引率

0.00%

发文量