H.264 decoder optimization exploiting SIMD instructions

Abstract

In this paper, H.264/AVC, the newest video coding standard, baseline profile decoder was implemented exploiting Intel MMX instructions. Both control- and data-level parallel processing approaches'were applied to the kernels of the baseline subsystems for efficiently utilizing the SIMD (Single Instruction Multiple Data) instructions. The data-level parallel approach tries to process multiple pixels at a time to fully utilize SIMD instructions. The data-level approach shows a better performance even though loop unrolling is further applied to the conlrol-level approach. The resultant implementations are also compared with the Intel Performance Primitives.