Z2-FET SPICE model: DC and memory operation

Abstract

Z2-FET is a promising candidate for 1T-DRAM application. We report a pragmatic SPICE compact model, including DC and memory operation description. It is aligned with our TCAD simulations. The proposed model is based on V-I threshold voltage approach and it includes memorization effect. This model is implemented using Verilog-A and allows to evaluate, through SPICE simulation, the figures of merits for DC, transient and memory operation.